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? semiconductor components industries, llc, 2014 november, 2014 ? rev. 6 1 publication order number: ncp705/d ncp705 500 ma, ultra-low quiescent current, i q 13 a, ultra-low noise, ldo voltage regulator noise sensitive rf applications such as power amplifiers in satellite radios, infotainment equipment, and precision instrumentation require very clean power supplies. the ncp705 is 500 ma ldo that provides the engineer with a very stable, accurate voltage with ultra low noise and very high power supply rejection ratio (psrr) suitable for rf applications. the device doesn?t require any additional noise bypass capacitor to achieve ultra?low noise performance. in order to optimize performance for battery operated portable applications, the ncp705 employs dynamic iq management for ultra?low quiescent current consumption at light?load conditions and great dynamic performance. features ? operating input voltage range: 2.5 v to 5.5 v ? available ? fixed voltage option: 0.8 v to 3.5 v available ? adjustable voltage option: 0.8 v to 5.5 v?v drop ? reference voltage 0.8 v ? ultra?low quiescent current of typ. 13 a ? ultra?low noise: 12 v rms from 100 hz to 100 khz ? very low dropout: 230 mv typical at 500 ma ? 2% accuracy over load/line/temperature ? high psrr: 71 db at 1 khz ? internal soft?start to limit the turn?on inrush current ? thermal shutdown and current limit protections ? stable with a 1 f ceramic output capacitor ? active output discharge for fast t urn?off ? these are pb?free devices typical applications ? pdas, mobile phones, gps, smartphones ? wireless handsets, wireless lan, bluetooth ? , zigbee ? ? portable medical equipment ? other battery powered applications figure 1. typical application schematics 1 f ncp705 in en gnd out 1 f off on n/c fixed voltage version c in v in c out v out ncp705 in en gnd out off on adj v in v out c out 1 f c 1 r 1 r 2 c in 1 f adjustable voltage version this document contains information on some products that are still under development. on semiconductor reserves the right to change or discontinue these products without notice. www. onsemi.com see detailed ordering, marking and shipping information on page 19 of this data sheet. ordering information marking diagram wdfn6 case 511br pin connections 1 2 3 gnd xx m 1 xx = specific device code m = date code 6 5 4 out n/c gnd in n/c en wdfn6 2x2 mm (top view) 1 2 3 gnd 6 5 4 out adj gnd in n/c en adjustable version (top view)
ncp705 www. onsemi.com 2 figure 2. simplified schematic block diagrams in thermal shutdown uvlo mosfet driver with current limit auto low power mode integrated soft?start active discharge en bandgap reference enable logic en out gnd in thermal shutdown uvlo mosfet driver with current limit auto low power mode integrated soft?start active discharge en bandgap reference enable logic en out gnd adj
ncp705 www. onsemi.com 3 table 1. pin function description pin no. pin name ? fixed pin name ? adjustable description 1 out out regulated output voltage pin. a small 1 f ceramic capacitor is needed from this pin to ground to assure stability. 2 n/c adj feedback pin for set?up output voltage. use resistor divider for voltage selection. 3 gnd gnd power supply ground. expose pad must be tied with gnd pin. soldered to the copper plane allows for effective heat dissipation. 4 en en enable pin. driving en over 0.9 v turns on the regulator. driving en below 0.4 v puts the regulator into shutdown mode. 5 n/c n/c not connected. this pin can be tied to ground to improve thermal dissipation. 6 in in input pin. a small capacitor is needed from this pin to ground to assure stability. table 2. absolute maximum ratings rating symbol value unit input voltage (note 1) v in ?0.3 v to 6 v v output voltage v out ?0.3 v to v in + 0.3 v v enable input v en ?0.3 v to v in + 0.3 v v adjustable input v adj ?0.3 v to v in + 0.3 v v output short circuit duration t sc indefinite s maximum junction temperature t j(max) 150 c storage temperature t stg ?55 to 150 c esd capability, human body model (note 2) esd hbm 2000 v esd capability, machine model (note 2) esd mm 200 v stresses exceeding those listed in the maximum ratings table may damage the device. if any of these limits are exceeded, device function ality should not be assumed, damage may occur and reliability may be affected. 1. refer to electrical characteristics and application information for safe operating area. 2. this device series incorporates esd protection and is tested by the following methods: esd human body model tested per aec?q100?002 (eia/jesd22?a114) esd machine model tested per aec?q100?003 (eia/jesd22?a115) latchup current maximum rating tested per jedec standard: jesd78. table 3. thermal characteristics (note 3) rating symbol value unit thermal characteristics, wdfn6 2x2 mm thermal resistance, junction?to?air thermal resistance parameter , junction?to?board ja jb 116.5 30 c/w 3. single component mounted on 1 oz, fr 4 pcb with 645 mm 2 cu area.
ncp705 www. onsemi.com 4 table 4. electrical characteristics ?40 c t j 125 c; v in = v out(nom) + 0.5 v or 2.5 v, whichever is greater; v en = 0.9 v, i out = 10 ma, c in = c out = 1 f unless otherwise noted. typical values are at t j = +25 c. (note 4) parameter test conditions symbol min typ max unit operating input voltage v in 2.5 5.5 v output voltage range (adjustable) v out 0.8 5.5? v do v undervoltage lock?out v in rising uvlo 1.2 1.6 1.9 v output voltage accuracy (fixed) v out + 0.5 v v in 5.5 v, i out = 0 ? 500 ma v out ?2 +2 % reference voltage v ref 0.8 v reference voltage accuracy i out = 10 ma v ref ?2 +2 % line regulation v out + 0.5 v v in 4.5 v, i out = 10 ma v out + 0.5 v v in 5.5 v, i out = 10 ma reg line 550 750 v/v load regulation i out = 0 ma to 500 ma reg load 12 v/ma load transient i out = 1 ma to 500 ma or 500 ma to 1 ma in 1 s, c out = 1 f tran load 120 mv dropout voltage (note 5) i out = 500 ma, v out(nom) = 2.8 v v do 230 350 mv output current limit v out = 90% v out(nom) i cl 510 750 950 ma quiescent current i out = 0 ma i q 13 25 a ground current i out = 500 ma i gnd 260 a shutdown current v en 0.4 v, t j = +25 c i dis 0.12 a v en 0 v, v in = 2.0 to 4.5 v, t j = ?40 to +85 c i dis 0.55 2 a en pin threshold voltage high threshold low threshold v en voltage increasing v en voltage decreasing v en_hi v en_lo 0.9 0.4 v en pin input current v en = 5.5 v i en 100 500 na adj pin current v adj = 0.8 v 1 na turn?on time c out = 1.0 f, from assertion en pin to 98% v out(nom) t on 150 s power supply rejection ratio v in = 3.8 v, v out = 2.8 v (fixed), i out = 500 ma f = 100 hz f = 1 khz f = 10 khz psrr 73 71 56 db output noise voltage v out = 2.5 v (fixed), v in = 3.5 v, i out = 500 ma f = 100 hz to 100 khz v n 12 v rms thermal shutdown temperature temperature increasing from t j = +25 c t sd 160 c thermal shutdown hysteresis temperature falling from t sd t sdh ? 20 ? c product parametric performance is indicated in the electrical characteristics for the listed test conditions, unless otherwise noted. product performance may not be indicated by the electrical characteristics if operated under different conditions. 4. performance guaranteed over the indicated operating temperature range by design and/or characterization. production tested at t j = t a = 25 c. low duty cycle pulse techniques are used during testing to maintain the junction temperature as close to ambient as possible . 5. characterized when v out falls 100 mv below the regulated voltage at v in = v out(nom) + 0.5 v.
ncp705 www. onsemi.com 5 typical characteristics figure 3. output voltage noise spectral density for v out = 0.8 v, c out = 1 f frequency (khz) 1000 10 1 0.1 0.01 0.001 0.01 0.1 1 10 figure 4. output voltage noise spectral density for v out = 0.8 v, c out = 10 f figure 5. output voltage noise spectral density for v out = 3.3 v, c out = 1 f output voltage noise ( v/rthz) v in = 2.5 v v out = 0.8 v c in = c out = 1 f mlcc, x7r, 1206 size i out = 10 ma i out = 300 ma i out = 500 ma 10 ma 19.06 18.21 100 ma 15.99 15.04 300 ma 14.42 13.39 10 hz ? 100 khz 100 hz ? 100 khz rms output noise ( v) i out frequency (khz) 0.001 0.01 0.1 1 10 output voltage noise ( v/rthz) frequency (khz) 0.001 0.01 0.1 1 10 output voltage noise ( v/rthz) v in = 3.8 v v out = 3.3 v c in = c out = 1 f mlcc, x7r, 1206 size 500 ma 13.70 12.60 10 ma 16.17 15.28 100 ma 16.41 15.65 300 ma 14.94 14.10 10 hz ? 100 khz 100 hz ? 100 khz rms output noise ( v) i out 500 ma 14.08 13.11 10 ma 18.12 15.39 100 ma 16.42 13.50 300 ma 16.35 12.47 10 hz ? 100 khz 100 hz ? 100 khz rms output noise ( v) i out 500 ma 16.00 12.10 100 1000 10 1 0.1 0.01 100 v in = 2.5 v v out = 0.8 v c in = 1 f c out = 10 f mlcc, x7r, 1206 size i out = 10 ma i out = 300 ma i out = 100 ma i out = 500 ma 1000 10 1 0.1 0.01 100 i out = 300 ma i out = 500 ma i out = 100 ma i out = 10 ma i out = 100 ma
ncp705 www. onsemi.com 6 typical characteristics figure 6. output voltage noise spectral density for v out = 3.3 v, c out = 10 f frequency (khz) 1000 10 1 0.1 0.01 0.001 0.01 0.1 1 10 output voltage noise ( v/rthz) v in = 3.8 v v out = 3.3 v c in = 1 f c out = 10 f mlcc, x7r, 1206 size i out = 10 ma i out = 100 ma i out = 500 ma 1 ma 17.35 14.07 100 ma 17.43 14.29 300 ma 16.55 13.33 10 hz ? 100 khz 100 hz ? 100 khz rms output noise ( v) i out 500 ma 16.48 13.20 100 i out = 300 ma figure 7. output voltage noise spectral density for adjustable version ? different output voltage frequency (khz) 1000 10 1 0.1 0.01 0.001 0.01 0.1 1 10 output voltage noise ( v/rthz) v in = v out +1 v c in = 1 f c out = 10 f i out = 10 ma v out = 3.3 v, r 1 = 25k, r 2 = 8.2k 1.5 v 31.40 30.33 3.3 v 49.14 44.30 10 hz ? 100 khz 100 hz ? 100 khz rms output noise ( v) v out 100 v out = 1.5 v, r 1 = 15k, r 2 = 13k figure 8. output voltage noise spectral density for adjustable version for various c1 frequency (khz) 1000 10 1 0.1 0.01 0.001 0.01 0.1 1 10 output voltage noise ( v/rthz) none 50.17 43.85 100 pf 46.90 40.39 1 nf 36.92 27.99 10 hz ? 100 khz 100 hz ? 100 khz rms output noise ( v) i out 10 nf 27.02 18.31 100 c 1 = none c 1 = 100 pf c 1 = 1 nf c 1 = 10 nf v in = 4.3 v v out = 3.3 v r 1 = 255k, r 2 = 82k c in = c out = 1 f i out = 10 ma
ncp705 www. onsemi.com 7 typical characteristics figure 9. ground current vs. output current figure 10. ground current vs. output current from 0 ma to 2 ma i out , output current (ma) i out , output current (ma) 500 450 200 150 100 50 0 450 figure 11. ground current vs. output current at temperatures figure 12. ground current vs. output current 0 ma to 2 ma at temperature i out , output current (ma) i out , output current (ma) i gnd , ground current ( a) i gnd , ground current ( a) i gnd , ground current ( a) i gnd , ground current ( a) v in = v out + 0.5 v c out = 1 f c in = 1 f mlcc, x7r, 1206 size 160 160 300 400 350 300 250 200 150 100 50 0 250 400 350 300 v out = 0.8 v v out = 3.3 v v out = 2.5 v 140 120 100 80 60 40 20 0 2 0 1.75 1.5 1.25 1 0.75 0.5 0.25 v out = 2.5 v v out = 3.3 v v out = 0.8 v v in = v out + 0.5 v c out = 1 f c in = 1 f mlcc, x7r, 1206 size 250 200 150 100 50 0 500 450 200 150 100 50 0 250 400 350 300 v in = 3.8 v v out = 3.3 v c out = 1 f c in = 1 f mlcc, x7r, 1206 size t j = 125 c t j = ?40 c t j = 25 c 2 0 1.75 1.5 1.25 1 0.75 0.5 0.25 t j = 125 c t j = 25 c t j = ?40 c v in = 3.8 v v out = 3.3 v c out = 1 f c in = 1 f mlcc, x7r, 1206 size 140 120 100 80 60 40 20 0 figure 13. quiescent current vs. temperature figure 14. dropout voltage vs. output current at temperature (2.5 v) t j , junction temperature ( c) i out , output current (ma) 140 120 100 80 60 ?20 0 ?40 16 500 350 300 250 150 100 50 0 320 i q , quiescent current ( a) v drop , dropout voltage (mv) 200 400 450 t j = 25 c t j = ?40 c t j = 125 c v in = v out + 0.5 v c out = 1 f c in = 1 f mlcc, x7r, 1206 size v out = 0.8 v v out = 2.5 v v out = 3.3 v 14 12 10 8 6 4 2 0 40 20 v in = v out + 0.5 v c out = 1 f c in = 1 f mlcc, x7r, 1206 size 280 240 200 160 120 80 40 0
ncp705 www. onsemi.com 8 typical characteristics figure 15. dropout voltage vs. output current at temperatures (3.3 v) figure 16. dropout voltage vs. temperature (2.5 v) i out , output current (ma) t j , junction temperature ( c) 400 figure 17. dropout voltage vs. temperature, (3.3 v) figure 18. input voltage vs. output voltage t j , junction temperature ( c) v in , input voltage (v) 5 4 2 1 0 4 v drop , dropout voltage (mv) v drop , dropout voltage (mv) v drop , dropout voltage (mv) v out , output voltage (v) t j = 25 c t j = ?40 c t j = 125 c 36 v in = v out + 0.5 v c out = 1 f c in = 1 f mlcc, x7r, 1206 size 500 350 300 250 150 100 50 0 200 400 450 320 280 240 200 160 120 80 40 0 350 300 250 200 150 100 50 0 140 120 100 80 60 ?20 0 ?40 40 20 i out = 500 ma i out = 300 ma i out = 0 ma v in = v out + 0.5 v c out = 1 f c in = 1 f mlcc, x7r, 1206 size 140 120 100 80 60 ?20 0 ?40 40 20 400 350 300 250 200 150 100 50 0 v in = v out + 0.5 v c out = 1 f c in = 1 f mlcc, x7r, 1206 size i out = 500 ma i out = 300 ma i out = 0 ma 3.5 3 2.5 2 1.5 1 0.5 0 i in = 0 ma c out = 1 f c in = 1 f mlcc, x7r, 1206 size v out = 0.8 v v out = 2.5 v v out = 3.3 v figure 19. output voltage vs. temperature, (0.8 v) figure 20. output voltage vs. temperature, (2.5 v) t j , junction temperature ( c) t j , junction temperature ( c) 120 100 80 40 20 0 ?20 ?40 0.8014 v out , output voltage (v) v out , output voltage (v) 60 140 120 100 80 40 20 0 ?20 ?40 60 140 1.804 v in = 2.5 v v out = 0.8 v c out = 1 f c in = 1 f mlcc, x7r, 1206 size 0.8012 0.8010 0.8008 0.8006 0.8004 0.8002 0.8000 0.7998 0.7996 0.7994 0.7992 0.7990 1.803 1.802 1.801 1.800 1.799 1.798 1.797 1.796 1.795 1.794 1.793 1.792 v in = 3 v v out = 2.5 v c out = 1 f c in = 1 f mlcc, x7r, 1206 size
ncp705 www. onsemi.com 9 typical characteristics figure 21. output voltage vs. temperature, (3.3 v) figure 22. line regulation vs. temperature, (1.8 v) t j , junction temperature ( c) t j , junction temperature ( c) 120 100 80 40 20 0 ?20 ?40 3.305 figure 23. line regulation vs. temperature, (3.3 v) figure 24. load regulation vs. temperature, (1.8 v) t j , junction temperature ( c) t j , junction temperature ( c) v out , output voltage (v) reg load , load regulation ( v/ma) 60 140 120 100 80 40 20 0 ?20 ?40 700 reg line , line regulation ( v/v) 60 140 120 100 80 40 20 0 ?20 ?40 1200 reg line , line regulation ( v/v) 60 140 120 100 80 40 20 0 ?20 ?40 8 60 140 v in = 3.8 v v out = 3.3 v c out = 1 f c in = 1 f mlcc, x7r, 1206 size 3.304 3.303 3.302 3.301 3.300 3.299 3.298 3.297 3.296 3.295 3.294 3.293 680 660 640 620 600 580 560 540 520 500 v in = 2.5 v v out = 1.8 v c out = 1 f c in = 1 f mlcc, x7r, 1206 size 1150 1050 1000 950 900 850 800 750 700 v in = 3.8 v v out = 3.3 v c out = 1 f c in = 1 f mlcc, x7r, 1206 size v in = 2.5 v v out = 1.8 v c out = 1 f c in = 1 f mlcc, x7r, 1206 size 7 6 5 4 3 2 1 0 figure 25. load regulation vs. temperature, (3.3 v) figure 26. disable current vs. temperature t j , junction temperature ( c) t j , junction temperature ( c) 120 100 60 40 20 0 ?20 ?40 8 reg load , load regulation ( v/ma) 80 140 120 100 60 40 20 0 ?20 ?40 0.3 i dis , disable current ( a) 80 140 v in = 3.8 v v out = 3.3 v c out = 1 f c in = 1 f mlcc, x7r, 1206 size 7 6 5 4 3 2 1 0 0.25 0.2 0.15 0.1 0.05 0 ?0.05 v en 0.4 v r l = 330 c out = 1 f c in = 1 f mlcc, x7r, 1206 size v in = 4.5 v v in = 2.3 v
ncp705 www. onsemi.com 10 typical characteristics figure 27. enable current vs. temperature figure 28. current limit vs. temperature t j , junction temperature ( c) t j , junction temperature ( c) 120 100 80 40 20 0 ?20 ?40 120 figure 29. short?circuit vs. temperature figure 30. short?circuit current vs. temperature t j , junction temperature ( c) v in , input voltage (v) i en , current to enable pin (na) i sc , short?circuit current (ma) i sc , short?circuit current (ma) 60 140 120 100 80 40 20 0 ?20 ?40 750 i cl , current limit (ma) 60 140 120 100 80 40 20 0 ?20 ?40 800 60 140 2.5 3.00 5.50 100 80 60 40 20 0 v in = 3.8 v v out = 3.3 v r l = 330 c out = 1 f c in = 1 f mlcc, x7r, 1206 size v en = 5.5 v v en = 0.4 v 735 720 705 690 675 660 645 630 615 600 v in = v out + 0.5 v c out = 1 f c in = 1 f mlcc, x7r, 1206 size v out = 1.8 v v out = 3.3 v 780 760 740 720 700 680 660 640 620 600 v in = v out + 0.5 v c out = 1 f c in = 1 f mlcc, x7r, 1206 size v out = 3.3 v v out = 1.8 v 800 780 760 740 720 700 680 660 640 620 600 v out = 0.8 v c in = 1 f cout = 1 f mlcc, x7r 1206 size 3.50 4.00 4.50 5.00 figure 31. enable threshold (high) figure 32. enable threshold (low) t j , junction temperature ( c) t j , junction temperature ( c) 120 100 60 40 20 0 ?20 ?40 1 v en , enable voltage (v) 80 140 120 100 60 40 20 0 ?20 ?40 v en , enable voltage (v) 80 140 v in = 3.8 v v out = 3.3 v c out = 1 f c in = 1 f mlcc, x7r, 1206 size 0.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0 1 0.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0 v in = 3.8 v v out = 3.3 v c out = 1 f c in = 1 f mlcc, x7r, 1206 size
ncp705 www. onsemi.com 11 typical characteristics i out = 10 ma i out = 100 ma i out = 300 ma i out = 500 ma figure 33. discharge resistance vs. temperature figure 34. start?up time vs. temperature t j , junction temperature ( c) t j , junction temperature ( c) 120 100 80 40 20 0 ?20 ?40 400 figure 35. power supply rejection ratio, v out = 1.8 v figure 36. power supply rejection ratio, v out = 2.8 v frequency (khz) frequency (khz) r dis , active discharge resistance ( ) rr, ripple rejection (db) rr, ripple rejection (db) 60 140 120 100 80 40 20 0 ?20 ?40 250 t start?up , start?up time ( s) 60 140 0.01 80 10k 90 v in = 3.8 v v out = 3.3 v c out = 1 f c in = 1 f mlcc, x7r, 1206 size 390 380 370 360 350 340 330 320 310 300 v in = 3.8 v v out = 3.3 v c out = 1 f c in = 1 f mlcc, x7r, 1206 size 240 230 220 210 200 190 180 170 160 150 0.1 1 10 100 1k 70 60 50 40 30 20 10 0 v in = 2.8 v + 100 mv pp v out = 1.8 v c out = 1 f c in = none mlcc, x7r, 1206 size 0.01 10k 0.1 1 10 100 1k 80 70 60 50 40 30 20 10 0 v in = 3.8 v + 100 mv pp v out = 2.8 v c out = 1 f c in = none mlcc, x7r, 1206 size i out = 10 ma i out = 100 ma i out = 300 ma i out = 500 ma i out = 10 ma i out = 100 ma i out = 300 ma i out = 500 ma figure 37. power supply rejection ratio, v out = 3.3 v figure 38. power supply rejection ratio, v out = 3.3 v, i out = 10 ma ? different c out frequency (khz) frequency (khz) rr, ripple rejection (db) rr, ripple rejection (db) 0.01 100 10k 90 0.1 1 10 100 1k v in = 4.3 v + 100 mv pp v out = 3.3 v c out = 1 f c in = none mlcc, x7r, 1206 size 0.01 10k 0.1 1 10 100 1k 80 70 60 50 40 30 20 10 0 v in = 4.3 v + 100 mv pp v out = 3.3 v c in = none mlcc, x7r, 1206 size c out = 1 f c out = 4.7 f c out = 10 f 90 80 70 60 50 40 30 20 10 0
ncp705 www. onsemi.com 12 typical characteristics figure 39. power supply rejection ratio, v out = 3.3 v, i out = 500 ma ? different c out frequency (khz) rr, ripple rejection (db) 0.01 100 10k 0.1 1 10 100 1k 90 80 70 60 50 40 30 20 10 0 v in = 4.3 v + 100 mv pp v out = 3.3 v i load = 500 ma c in = none mlcc, x7r, 1206 size c out = 1 f c out = 4.7 f c out = 10 f figure 40. power supply rejection ratio, v out = 3.3 v, i out = 10 ma ? different c1 frequency (khz) rr, ripple rejection (db) 0.01 10k 0.1 1 10 100 1k 80 70 60 50 40 30 20 10 0 c 1 = none c 1 = 100 pf c 1 = 1 nf c 1 = 10 nf c 1 = 100 nf v in = 4.3 v + 100 mv pp v out = 3.3 v r 1 = 225k, r 2 = 82k i load = 10 ma c out = 1 f mlcc, x7r, 1206 size figure 41. output capacitor esr vs. output current i out , output current (ma) esr, equivalent serial resistance ( ) 100 10 1 0.1 0.01 0 500 50 150 400 100 450 200 350 300 250 v out = 0.8 v v out = 3.3 v unstable region stable region figure 42. enable turn?on response, c out = 1 f, i out = 10 ma figure 43. enable turn?on response, c out = 1 f, i out = 500 ma v in = 3.8 v v out = 3.3 v v en = 1 v c out = 1 f c in = 1 f i out = 500 ma 500 mv/div 1 v/div 200 ma/div i inrush 100 s/div v en v out v in = 3.8 v v out = 3.3 v v en = 1 v c out = 1 f c in = 1 f i out = 500 ma 200 ma/div 500 mv/div 1 v/div v en i inrush v out 100 s/div
ncp705 www. onsemi.com 13 typical characteristics figure 44. enable turn?on response, c out = 10 f, i out = 10 ma 500 mv/div 1 v/div 200 ma/div i inrush 100 s/div v en v out v in = 3.8 v v out = 3.3 v v en = 1 v c out = 10 f c in = 1 f i out = 500 ma 200 ma/div 500 mv/div 1 v/div v in = 3.8 v v out = 3.3 v v en = 1 v c out = 10 f c in = 1 f i out = 500 ma figure 45. enable turn?on response, c out = 10 f, i out = 500 ma 100 s/div i inrush v en v out 500 mv/div 20 mv/div figure 46. line transient response ? rising edge, v out = 0.8 v, i out = 10 ma 5 s/div v in = 2.5 v v out = 0.8 v v en = 1 v i out = 10 ma t rise = 1 s c out = 1 f c out = 10 f v en v out figure 47. line transient response ? falling edge, v out = 0.8 v, i out = 10 ma 5 s/div 500 mv/div 20 mv/div v in = 2.5 v v out = 0.8 v v en = 1 v i out = 10 ma c out = 1 f c out = 10 f t fall = 1 s v en v out 500 mv/div 20 mv/div figure 48. line transient response ? rising edge, v out = 3.3 v, i out = 10 ma 10 s/div c out = 1 f c out = 10 f t rise = 1 s v en v out v in = 3.8 v v out = 3.3 v v en = 1 v i out = 10 ma figure 49. line transient response ? falling edge, v out = 3.3 v, i out = 10 ma 10 s/div 500 mv/div 20 mv/div v in = 3.8 v v out = 3.3 v v en = 1 v i out = 10 ma t fall = 1 s c out = 10 f c out = 1 f v out v en
ncp705 www. onsemi.com 14 typical characteristics 500 mv/div 20 mv/div figure 50. line transient response ? rising edge, v out = 3.3 v, i out = 500 ma 5 s/div c out = 1 f t rise = 1 s v en v out v in = 3.8 v v out = 3.3 v v en = 1 v i out = 500 ma c out = 10 f figure 51. line transient response ? falling edge, v out = 3.3 v, i out = 500 ma 10 s/div 500 mv/div 20 mv/div v in = 3.8 v v out = 3.3 v v en = 1 v i out = 500 ma t fall = 1 s c out = 1 f c out = 10 f v en v out 200 ma/div 100 mv/div figure 52. load transient response ? rising edge, v out = 0.8 v, i out = 1 ma to 500 ma, c out = 1 f, 10 f 10 s/div c out = 1 f c out = 10 f t rise = 1 s v out i out v in = 2.5 v v out = 0.8 v c in = 1 f (mlcc) c out = 10 f c out = 1 f t fall = 1 s v in = 2.5 v v out = 0.8 v c in = 1 f (mlcc) figure 53. load transient response ? falling edge, v out = 0.8 v, i out = 1 ma to 500 ma, c out = 1 f, 10 f 100 s/div v out i out 200 ma/div 50 mv/div 200 ma/div 100 mv/div figure 54. load transient response ? rising edge, v out = 0.8 v, i out = 1 ma to 500 ma, t rise_iout = 1 s, 10 s 10 s/div t rise_iout = 10 s t rise_iout = 1 s v out i out v in = 2.5 v v out = 0.8 v c in = 1 f (mlcc) c out = 1 f (mlcc) figure 55. load transient response ? falling edge, v out = 0.8 v, i out = 1 ma to 500 ma, t fall_iout = 1 s, 10 s 10 s/div t fall_iout = 1 s t fall_iout = 10 s 200 ma/div 50 mv/div v out i out v in = 2.5 v v out = 0.8 v c in = 1 f (mlcc) c out = 1 f (mlcc)
ncp705 www. onsemi.com 15 typical characteristics 200 ma/div 100 mv/div figure 56. load transient response ? rising edge, v out = 3.3 v, i out = 1 ma to 500 ma, c out = 1 f, 10 f 5 s/div v in = 3.8 v v out = 3.3 v c in = 1 f (mlcc) c out = 1 f c out = 10 f v out i out figure 57. load transient response ? falling edge, v out = 3.3 v, i out = 1 ma to 500 ma, c out = 1 f, 10 f 50 s/div 200 ma/div 50 mv/div v out i out c out = 10 f c out = 1 f v in = 3.8 v v out = 3.3 v c in = 1 f (mlcc) 200 ma/div 50 mv/div figure 58. load transient response ? rising edge, v out = 3.3 v, i out = 1 ma to 500 ma, t rise_iout = 1 s, 10 s 10 s/div figure 59. load transient response ? falling edge, v out = 3.3 v, i out = 1 ma to 500 ma, t fall_iout = 1 s, 10 s 50 s/div t rise_iout = 10 s t rise_iout = 1 s v out i out v in = 3.8 v v out = 3.3 v c in = 1 f (mlcc) c out = 1 f (mlcc) v in = 3.8 v v out = 3.3 v c in = 1 f (mlcc) c out = 1 f (mlcc) v out i out t fall_iout = 10 s t fall_iout = 1 s 200 ma/div 50 mv/div v out v in v in = 3.3 v i out = 1 ma c in = 1 f (mlcc) c out = 1 f (mlcc) 600 mv/div figure 60. turn?on/off, slow rising v in 5 ms/div figure 61. short?circuit and thermal shutdown 20 ms/div 1 v/div 500 ma/div i out v out short?circuit thermal shutdown v in = 5.5 v v out = 3.3 v c in = 1 f (mlcc) c out = 1 f (mlcc)
ncp705 www. onsemi.com 16 typical characteristics figure 62. short?circuit current peak 50 s/div 1 v/div 500 ma/div i out v out v in = 5.5 v v out = 3.3 v c in = 1 f (mlcc) c out = 1 f (mlcc) 500 ma/div 1 v/div figure 63. enable turn?off 5 ms/div v in = 5.5 v v out = 3.3 v c in = 1 f (mlcc) c out = 1 f (mlcc) c out = 1 f c out = 10 f v en v out
ncp705 www. onsemi.com 17 applications information general the ncp705 is a high performance 500 ma low dropout linear regulator. this device delivers excellent noise and dynamic performance. thanks to its adaptive ground current feature the device consumes only 13 a of quiescent current at no?load condition. the regulator features ultra low noise of 12 vrms, psrr of 71 db at 1 khz and very good load/line transient performance. such excellent dynamic parameters and small package size make the device an ideal choice for powering the precision analog and noise sensitive circuitry in portable applications. the ldo achieves this ultra low noise level output without the need for a noise bypass capacitor. a logic en input provides on/off control of the output voltage. when the en is low the device consumes as low as typ. 10 na from the in pin. the device is fully protected in case of output overload, output short circuit condition and overheating, assuring a very robust design. input capacitor selection (cin) it is recommended to connect a minimum of 1 f ceramic x5r or x7r capacitor close to the in pin of the device. this capacitor will provide a low impedance path for unwanted ac signals or noise modulated onto constant input voltage. there is no req uirement for the min. /max. esr of the input capacitor but it is recommended to use ceramic capacitors for their low esr and esl. a good input capacitor will limit the influence of input trace inductance and source resistance during sudden load current changes. larger input capacitor may be necessary if fast and large load transients are encountered in the application. output decoupling (cout) the ncp705 requires an output capacitor connected as close as possible to the output pin of the regulator. the minimal capacitor value is 1 f and x7r or x5r dielectric due to its low capacitance variations over the specified temperature range. the ncp705 is designed to remain stable with minimum effective capacitance of 1 f to account for changes with temperature, dc bias and package size. especially for small package size capacitors such as 0402 the effective capacitance drops rapidly with the applied dc bias. refer to the figure 64, for the capacitance vs. package size and dc bias voltage dependence. there is no requirement for the minimum value of equivalent series resistance (esr) for the c out but the maximum value of esr should be less than 900 m . larger output capacitors and lower esr could improve the load transient response or high frequency psrr as shown in typical characteristics. it is not recommended to use tantalum capacitors on the output due to their large esr. the equivalent series resistance of tantalum capacitors is also strongly dependent on the temperature, increasing at low temperature. the tantalum capacitors are generally more costly than ceramic capacitors. figure 64. capacitance change vs. dc bias 1206 0805 0603 0402 dc bias (v) capacity change (%) 010 19 8 7 6 2345 10 0 ?10 ?20 ?30 ?40 ?50 ?60 ?70 ?80 package size no?load operation the regulator remains stable and regulates the output voltage properly within the 2% tolerance limits even with no external load applied to the output. adjustable operation the output voltage range can be set from 0.8 v to 5.5 v?v do by resistor divider network. use equations 1 and 2 to calculate appropriate values of resistors and output voltage. typical current to adj pin is 1 na. for output voltage 0.8 v adj pin can be tied directly to vout pin. v out 0.8 1 r 1 r 2 r 1 i adj (eq. 1) r 2 r 1 1 v out 0.8 1 (eq. 2) the resistor divider should be designed carefully to achieve the best performance. recommended current through divider is 10 a and more. too high values of resistors (m ) cause increasing noise and longer start?up time. the suggested values of the resistors are in table 5. to improve dynamic performance capacitor c1 should be at least 1 nf. recommended range of capacity is between 10 nf and 100 nf. higher value of capacitor c1 increasing start?up time. table 5. proposal resistor values for variuos v out v out r1 r2 1.5 v 130k 150k 3.3 v 256k 82k 5.0 v 430k 82k
ncp705 www. onsemi.com 18 figure 65. ncp705 adjustable with noise improvement capacitor ncp705 in en gnd out off on adj v in v out c out 1 f c 1 r 1 r 2 c in 1 f enable operation the ncp705 uses the en pin to enable/disable its device and to deactivate/activate the active discharge function. if the en pin voltage >0.9 v the device is guaranteed to be enabled. the ncp705 regulates the output voltage and the active discharge transistor is turned?off. the en pin has internal pull?down current source with typ. value of 110 na which assures that the device is turned?off when the en pin is not connected. build in 2 mv hysteresis into the en prevents from periodic on/off oscillations that can occur due to noise. in the case where the en function isn?t required the en should be tied directly to in. undervoltage lockout the internal uvlo circuitry assures that the device becomes disabled when the v in falls below typ. 1.5 v. when the v in voltage ramps?up the ncp705 becomes enabled, if v in rises above typ. 1.6 v. the 100 mv hysteresis prevents from on/off oscillations that can occur due to noise on v in line. output current limit output current is internally limited within the ic to a typical 750 ma. the ncp705 will source this amount of current measured with a voltage drops on the 90% of the nominal v out . if the output voltage is directly shorted to ground (v out = 0 v), the short circuit protection will limit the output current to 800 ma (typ). the current limit and short circuit protection will work properly up to v in = 5.5 v at t a = 125 c. there is no limitation for the short circuit duration. internal soft?start circuit ncp705 contains an internal soft?start circuitry to protect against large inrush currents which could otherwise flow during the start?up of the regulator. soft?start feature protects against power bus disturbances and assures a controlled and monotonic rise of the output voltage. thermal shutdown when the die temperature exceeds the thermal shutdown threshold (t sd 160 c typical), thermal shutdown event is detected and the device is disabled. the ic will remain in this state until the die temperature decreases below the thermal shutdown reset threshold (t sdu 140 c typical). once the ic temperature falls below the 140 c the ldo is enabled again. the thermal shutdown feature provides the protection from a catastrophic device failure due to accidental overheating. this protection is not intended to be used as a substitute for proper heat sinking. for reliable operation junction temperature should be limited to +125 c maximum. power dissipation as power dissipated in the ncp705 increases, it might become necessary to provide some thermal relief. the maximum power dissipation supported by the device is dependent upon board design and layout. mounting pad configuration on the pcb, the board material, and the ambient temperature affect the rate of junction temperature rise for the part. the maximum power dissipation the ncp705 can handle is given by: p d(max) 125 o c t a
ja (eq. 3) the power dissipated by the ncp705 for given application conditions can be calculated from the following equations: p d v in i gnd @i out i out v in v out (eq. 4) figure 66. ja and p d(max) vs. copper area (wdfn6) 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 80 100 120 140 160 180 200 220 0 100 200 300 400 500 600 700 copper heat spreader area (mm 2 ) ja , junction?to?ambient thermal resistance ( c/w) p d(max) , t a = 25 c, 2 oz cu p d(max) , maximum power dissipation (w) p d(max) , t a = 25 c, 1 oz cu ja , 1 oz cu ja , 2 oz cu
ncp705 www. onsemi.com 19 reverse current the pmos pass transistor has an inherent body diode which will be forward biased in the case that v out > v in . due to this fact in cases, where the extended reverse current condition can be anticipated the device may require additional external protection. load regulation the ncp705 features very good load regulation of maximum 2 mv in 0 ma to 500 ma range. in order to achieve this very good load regulation a special attention to pcb design is necessary. the trace resistance from the out pin to the point of load can easily approach 100 m which will cause 50 mv voltage drop at full load current, deteriorating the excellent load regulation. line regulation the ic features very good line regulation of 0.75 mv/v measured from v in = v out + 0.5 v to 5.5 v. for battery operated applications it may be important that the line regulation from v in = v out + 0.5 v up to 4.5 v is only 0.55 mv/v. power supply rejection ratio the ncp705 features very good power supply rejection ratio. if desired the psrr at higher frequencies in the range 100 khz ? 10 mhz can be tuned by the selection of c out capacitor and proper pcb layout. output noise the ic is designed for ultra?low noise output voltage without external noise filter capacitor (c nr ). figures 3 ? 6 shows ncp705 noise performance. generally the noise performance in the indicated frequency range improves with increasing output current. turn?on time the turn?on time is defined as the time period from en assertion to the point in which v out will reach 98% of its nominal value. this time is dependent on various application conditions such as v out(nom) , c out , t a . pcb layout recommendations to obtain good transient performance and good regulation characteristics place c in and c out capacitors close to the device pins and make the pcb traces wide. in order to minimize the solution size, use 0402 capacitors. larger copper area connected to the pins will also improve the device thermal resistance. the actual power dissipation can be calculated from the equation above (equation 4). ordering information device voltage option marking package shipping ? ncp705mt09tcg 0.9 v 5g wdfn6 (pb?free) 3000 / tape & reel ncp705mt18tcg 1.8 v 5a ncp705mt28tcg 2.8 v 5c ncp705mt30tcg 3.0 v 5d NCP705MT33TCG 3.3 v 5e ncp705mtadjtcg adjustable 5j ?for information on tape and reel specifications, including part orientation and tape sizes, please refer to our tape and reel packaging specifications brochure, brd8011/d.
ncp705 www. onsemi.com 20 package dimensions wdfn6 2x2, 0.65p case 511br issue o notes: 1. dimensioning and tolerancing per asme y14.5m, 1994. 2. controlling dimension: millimeters. 3. dimension b applies to plated terminal and is measured between 0.15 and 0.25 mm from the terminal tip. 4. coplanarity applies to the exposed pad as well as the terminals. seating plane d e 0.10 c a3 a a1 0.10 c dim a min max millimeters 0.70 0.80 a1 0.00 0.05 a3 0.20 ref b 0.25 0.35 d 2.00 bsc d2 1.50 1.70 0.90 1.10 e 2.00 bsc e2 e 0.65 bsc 0.20 0.40 l pin one reference 0.05 c 0.05 c note 4 a 0.10 c note 3 l e d2 e2 b b 3 6 6x 1 4 0.05 c mounting footprint* bottom view recommended dimensions: millimeters l1 detail a l alternate constructions l ?? --- 0.15 l1 6x 0.45 2.30 1.12 1.72 0.65 pitch 6x 0.40 1 package outline 6x m m *for additional information on our pb?free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. on semiconductor and the are registered trademarks of semiconductor components industries, llc (scillc) or its subsidia ries in the united states and/or other countries. scillc owns the rights to a number of pa tents, trademarks, copyrights, trade secret s, and other intellectual property. a listin g of scillc?s product/patent coverage may be accessed at www.onsemi.com/site/pdf/patent?marking.pdf. scillc reserves the right to make changes without further notice to any product s herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for any part icular purpose, nor does sci llc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. ?typi cal? parameters which may be provided in scillc data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. all operating param eters, including ?typicals? must be validated for each customer application by customer?s technical experts. scillc does not convey any license under its patent rights nor the right s of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgic al implant into the body, or other applications intended to s upport or sustain life, or for any other application in which the failure of the scillc product could create a situation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer s hall indemnify and hold scillc and its officers , employees, subsidiaries, affiliates, and dist ributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that scillc was negligent regarding the design or manufac ture of the part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyright laws and is not for resale in any manner. p ublication ordering information n. american technical support : 800?282?9855 toll free usa/canada europe, middle east and africa technical support: phone: 421 33 790 2910 japan customer focus center phone: 81?3?5817?1050 ncp705/d bluetooth is a registered trademark fo bluetooth sig. zigbee is a registered trademark of zigbee alliance. literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 303?675?2175 or 800?344?3860 toll free usa/canada fax : 303?675?2176 or 800?344?3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : www.onsemi.com order literature : http://www.onsemi.com/orderlit for additional information, please contact your loc al sales representative

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